ETMEN=DISABLED, LOCK=UNLOCKED, LPTOSEL=LPT0OUT0, JTAGEN=DISABLED, PMATCHEN=DISABLED, SPI1SEL=DISABLED, SWVEN=DISABLED
Global Port Control 1
| JTAGEN | JTAG Enable. 0 (DISABLED): JTAG functionality is not pinned out. 1 (ENABLED): JTAG functionality is pinned out. |
| ETMEN | ETM Enable. 0 (DISABLED): ETM not pinned out. 1 (ENABLED): ETM is enabled and pinned out. |
| SWVEN | SWV Enable. 0 (DISABLED): SWV is not pinned out. 1 (ENABLED): SWV is enabled and pinned out. |
| SPI1SEL | SPI1 Fixed Port Selection. 0 (DISABLED): Disconnect SPI1 from the dedicated pins. 1 (ENABLED): Connect SPI1 to the dedicated pins. |
| PMATCHEN | Port Match Interrupt Enable. 0 (DISABLED): Disable the port match logic. The PBnMAT registers are not read/write accessible on the APB bus. 1 (ENABLED): Enable the port match logic to generate a port match interrupt. The PBnMAT registers are read/write accessible on the APB bus. |
| LPTOSEL | Low Power Timer Output Pin Select. 0 (LPT0OUT0): Route the Low Power Timer output to LPT0OUT0. 1 (LPT0OUT1): Route the Low Power Timer output to LPT0OUT1. |
| LOCK | Port Bank Configuration Lock. 0 (UNLOCKED): Port Bank Configuration and Control registers are unlocked. 1 (LOCKED): The following registers are locked from write access: CONTROL1, XBAR0, and all PBSKIP registers. |